FutureCom workshop at IEEE M&N 2024

FutureCom workshop at 2024 IEEE Symposium on Measurements and Networking

An exciting one-day workshop entitled “Measurement Methods for Signal/Power Integrity and Active Devices and Circuits Characterization” is being organised on Wednesday 3rd July in Rome as part of the 2024 IEEE International Symposium on Measurements and Networking.

The workshop will feature seven speakers, mostly participants in the FutureCom project, and will include two panel sessions to encourage interactions between the speakers and the attendees.

July 3, 2024

Conference website

Workshop Agenda

Dilbagh SinghNational Physical Laboratory, UK

Characterising non-linear behaviour of high power GaN FETs

This presentation covers design and fabrication of test fixture structures for measurement of surface mount, high power GaN devices. The analysis and measurements of GaN devices operating in non-linear mode under non-50 Ohm load conditions will be presented.

Faisal MubarakVSL Dutch Metrology Institute, The Netherlands

Analysis of the Measurement Noise in Reflection Coefficients Synthesized with Mixed-Signal Active Tuners

In this talk, we present a detailed study based on uncertainty propagation techniques to estimate the random variation of the controlled reflection coefficient in mixed-signal load-pull test benches. To analyze the random noise of the injected wave, which can be mapped to the noise of the controlled reflection coefficient, we employ Jacobian sensitivity functions between the baseband signal and the RF one. First, the baseband integrated rms noise of the up-converter is evaluated, and then the upconverted noise is determined via the derived transfer function. Finally, experimental results to validate the uncertainty control bound of the synthesized reflection coefficients are presented, highlighting a full coverage of the measured reflection coefficients.

Hung-Ju LinMETAS, Switzerland

A novel Coaxial On-wafer Probe: Manufacturing and relevant Performance Tests

Coaxial structures are particularly beneficial for transmitting broadband signals. Compared to open transmission line structures the shielding against the surrounding environment is favorable. Shielding will limit stray fields and parasitic effects. In addition, the pitch size of RF probes used for on-wafer measurements scales inversely with the operating frequencies to avoid unwanted effects.

In digital communication the trends towards higher frequencies in support of higher data rates and miniaturization for efficiency and compactness ask for new robust designs of small pitch size measurement capabilities with optimal shielding properties reaching beyond currently established industry standards. This talk will be focused on a novel coaxial probe design with small pitch size, its fabrication, and the initial electrical resistance tests relevant for on-wafer probing. The different manufacturing steps to realize the goal of a coaxially shielded probe with 50 µm pitch size, suitable for on-wafer measurements, are explained. The fabrication process starts from pulling glass capillaries with a metal wire inside to achieve a coaxial structure and ends with an advanced micro-machining technique, plasma focused ion beam (PFIB) to shape the desired high precision ground-signal-ground structure at the probe head. Preliminary tests of the electrical resistivity and the use of the probes in high-frequency Short-Open-Load (SOL) calibrations show their potential for future on-wafer probing and other metrology applications.

Djamel AllalLaboratoire National de Métrologie et d’Essais, France

Developing and characterizing on-wafer reference structures for signal Integrity metrology at the chip level

This presentation covers the design, fabrication and analysis of on-wafer test structures developed with a view to establishing a traceable methodology for SI characterization of FPGA circuits. Several test structures in thin-film microstrip line (TFMSL) technology were fabricated, varying their dimensional characteristics to focus on specific SI parameters. Calibration standards were incorporated on the same chip to enable accurate characterization of the test structures by mixed-mode S-parameter measurements.

Gia Ngoc PhungPhysikalisch-Technische Bundesanstalt, Germany

Recommendations for the Design of Differential Thin-Film Microstrip Lines

Reliable high-speed data transmission and high-speed electronic components require a high level of Signal Integrity (SI) to handle hundreds of channels and thousands of input/output connections on a single chip. Due to the increasing demand for high-density layouts on a single chip, crosstalk effects are becoming critical for the system performance. This presentation investigates crosstalk effects for coupled thin-film microstrip lines (TFMSL) in the frequency range up to 50 GHz.

Khitem LahbachaUniversity of Cassino and Southern Lazio, Italy

Power integrity and electromagnetic interference characterization of FPGA boards and performance

This presentation focuses on the development of an FPGA-based vector network analyzer (VNA) for power integrity (PI) characterization at the board level, comparing its reliability with that of a reference VNA. It also explores the use of board-level electromagnetic simulations and electromagnetic interference (EMI) measurements to assess the impact of function location on EMI in FPGA boards.

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